Understanding Caches
A. Comparison of Main Memory and Caches
Access speed is the major difference between caches and main memory.  As the primary storage unit, main memory is typically built using dynamic random access memory (DRAM), which requires continual refreshing*. Main memory provides a large storage capacity at a low cost. Modern main memory is usually built-in gigabytes (GB). Generally, the main memory is located outside the processor. 
On the other hand, caches are built using static random access memory (SRAM), which does not require refreshing*. Caches have a smaller capacity at a higher cost than main memory. It is usually built in megabytes (MB). It is located closer to the CPU and can be placed inside or outside the processor.
With a smaller capacity, caches can only hold a small amount of data, but it enables faster data search and reduces latency. Meanwhile, the close proximity of caches allows a shorter data transfer time, which reduces latency and increases access speed. With the aid of faster SRAM technology, caches can provide 10-100 times faster access to the stored data than the main memory.
  
    
      
 
* More information about DRAM and SRAM
 
 
 
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 On the other hand, caches are built using static random access memory (SRAM), which does not require refreshing*. Caches have a smaller capacity at a higher cost than main memory. It is usually built in megabytes (MB). It is located closer to the CPU and can be placed inside or outside the processor.
With a smaller capacity, caches can only hold a small amount of data, but it enables faster data search and reduces latency. Meanwhile, the close proximity of caches allows a shorter data transfer time, which reduces latency and increases access speed. With the aid of faster SRAM technology, caches can provide 10-100 times faster access to the stored data than the main memory.
| Main Memory | Cache | |
|---|---|---|
| Memory type | DRAM | SRAM | 
| Capacity | Larger | Smaller | 
| Access Time | Slower (60–100 nanoseconds) | Faster (1–20 nanoseconds) | 
* More information about DRAM and SRAM
By Cheng Man Ho (56612619)
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